Sunday, March 31, 2019

ULX3S FPGA Examples

March has been FPGA learning month. I created some examples that were accepted by emard into the  new ULX3S Examples repo.

ULX3S SDR with ALINX AD/DA

Last year, I wrote about the ALINX AD/DA Module that I found on fleabay. Anyone interested in this board should certainly watch the video posted by opentechlab.

Key tidbits of information from the video:

  • DAC is powered by onboard 3.3V regulator.


  • Output from the DAC is differential 3vpp; (true output is difference) each output goes though a low pass filter for anti-aliasing. 


  • Fed into AD 8056 op-amp to convert differential signal to single-ended and level shift from 3vpp to 10vpp (-5 to +5V)


  • Potentiometer is used to control gain of output.


  • There's a bit of input protection on the ADC.


  • Input filter converts 10vpp to 3vpp for ADC chip.


  • MC34063 Step-Up/Down/Inverting Switching Regulators to generate negative rail for output from single +5VDC supply.



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